This standard was last reviewed and confirmed in 2018. Therefore this version remains current.
Defines the operation, functions, and attributes of the IEEE 1296 bus standard. Defines a high-performance 32-bit synchronous bus standard. Intended for general purpose applications to optimize block transfers, including protocol for message passing. Intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system and heterogeneous processor types in the same system.
Status: PublishedPublication date: 1994-12
Edition: 1Number of pages: 130
Technical Committee: ISO/IEC JTC 1/SC 25 Interconnection of information technology equipment
- ICS :
- 35.160 Microprocessor systems
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|std 1 208|
|std 2 208||Paper|
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Stage: 90.93 (Confirmed)
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